Collision avoidance system ground station synchronization

ABSTRACT

A collision avoidance system ground station has its clock phase synchronized with a master clock through the use of a line-ofsight radio link. Multiple two-way synchronization rangings are exchanged between the ground station and the master clock. A digital counter at the ground station obtains the average deviation of the ground station clock with respect to the master clock and applies this average deviation to calibrate or synchronize the ground station clock with the master clock. Subsequently, further multiple two-way synchronization rangings are exchanged between the ground station clock and the master clock. A digital counter at the master clock now obtains the average deviation of the master clock with respect to the ground station clock as a check of the validity of the ground station clock calibration.

United States Patent 11 1 Shear et al.

[ COLLISION AVOIDANCE SYSTEM GROUND STATION SYNCHRONIZATION Inventors:Wayne G. Shear; Brendan J. Spratt,

both of Pompano Beach; Benton J. McClure, Lighthouse Point, all of Dec.25, 1973 Primary Examiner-JohnW. Caldwell Assistant ExaminerMarshall M.Curtis Att0meyBruce L. Lamb et al.

Fla. [57] ABSTRACT 73 Assignee; The Bendix Corporation, s thfi ld Acollision avoidance system ground station has its Mi h clock phasesynchronized with a master clock through l the use of a line-of-sightradio link. Multiple two-way [22] Filed. Apr. 10, 1972 synchronizationrangings are exchanged between the 211 App] 242 31 ground station andthe master clock. A digital counter at the ground station obtains theaverage deviation of [52] U S CI 340/147 SY 343/225 the ground stationclock with respect to the master clock and applies this averagedeviation to calibrate or [51] llll. Cl. H04] 7/08 synchronize theground Station clock with the master [58] held of Search clock.Subsequently, further multiple two-way syni chronization rangings areexchanged between the ground station clock and the master clock. Adigital [56] References cued counter at the master clock now obtains theaverage UNI ED S A S A E TS deviation of the master clock with respectto the 3,185,963 5/1965 Peterson et al. 340 147 SY gr n t ion cl ck as aheck of th validity of the 3,681,914 8/1972 Loewengart 340/147 SY groundstation clock calibration. 3,541,552 11/1970 Carlson 340/147 SY D3,109,297 11/1963 Carbrey 340 147 SY 4 Claims, 4 Drawmg Figures nmrs swcREQUEST 24 1\ 4401 i l 1MODULATOR l 44 42I 1 PULSE BIPHASE B1PHAsECAL'BRATE WW 406 :1 DECODERJ BECQDER I IMODULATOR C LE MODE INITIATE A EM T Y L '26 GROUND STATION 1.0.

EXCITER SWITCHES REg fiSE im 63 CALIBRATION COMPLETE MEMORY 40 I2 t -tlO 5 OT I 3 SLOT COUNTER S Eg 30 300 L NUMBER 20a\ I4 CALIBRATION ENABLEINTERNALACOUNTER 60u FNCHRONIZATION CLOCK COUNTER 60b EXCLUSIVE ORENABLE DOWN UP ERROR ACCUMULATOR 66 CLOCK ERROR READ OUT In PATENTEU J53. 781 .803

SHEET 1 BF 2 r L -L MODULATOR F 340 INITIATE sYNC 4O PULSE BIPHASEBIPHAsE 44\ REQUEST I OECOOER OECOOER MODULATOR 40G EMPTY sLOT MEMORY280 6 I C EXCITER EMPTY C sYNC MOOE ENABLE REPLY CALIBRATION COMPLETE II20 SLOT NUMBER t \t l IZb I2 I 7 LOT COUNTER FREQ /IO 8 SOURCE 20\ M J600 7 30 30q RESET ENABLE I4 I6 I8 CALIBRATION v INTERNAL COUNTERsYNCHRONIzATION L K CLOCK 30L) COUNTER GATED SYNC REPLY 32o CORRECTION IFF E'xCLUsIvE OR ENABLE t3 52 i i FF s DOWN v v 2 FF UP ERROR VACCUMULATOR P COUNT DOWN sYNC SYNC COUNT UP r l I RESPONSE RESPONSE\H1"\1 s 2 3 1 s 2 3 COLLISION AVOIDANCE SYSTEM GROUND STATIONSYNCI-IRONIZATION BACKGROUND OF THE INVENTION This invention relates tomeans for calibrating a network of time sources at locations remote fromone another and it particularly relates to means for calibrating theground stations needed to make practical a collision avoidance systemutilizing the so-called master time technique. In this type of collisionavoidance system each cooperating aircraft is equipped with an accurateclock, which suitably includes either an atomic or a very accuratelycontrolled crystal frequency source, which is synchronized with allother airborne clocks in a given anti-collision net. A network ofsynchronized ground clocks provides overall system continuity. Theaforementioned collision avoidance system makes use of a system epochwhich is divided into equally spaced time slots, each aircraft in thecollision avoidance network occupying a separate time slot. Theimportance of maintaining clocks within this type of collision avoidancenetwork in accurate calibration is seen in the fact that collisionavoidance messages are transmitted one way during the time slot assignedto a particular aircraft. The aircraft transmits on a precisely definedcarrier frequency assigned to its time slot a collision avoidancemessage generally containing information as to its range, range rate andaltitude. A cooperating aircraft which receives this message determinesthe range of the transmitting aircraft by comparing the time of receiptof the message with'the beginning of the time slot as determined by theclock on the receiving aircraft. It can thus be seen that small errorsin time will result in large errors of range.

It is proposed that airborne clocks be started and time synchronized inlarge terminal areas by reference to ground stations operating on asingle worldwide time. It is additionally proposed that airbornestations while within the area of ground station influences maintaintheir clocks synchronized with the ground stations by a two-way rangingtechnique of the type well known to those skilled in this art.

Ground stations use one or more clocks of great accuracy, typicallyparts in 10", to maintain the required system continuity. ln spite ofthis extreme accuracy of the ground station clocks, the necessaryparameters of a practical collision avoidance system as determined bythe limitations of the two-way ranging technique whereby airbornestations are synchronized with the ground stations require that theground station clocks maintain accuracy in the order of half amicrosecond. To maintain this type of accuracy ground station clocksneed to be calibrated approximately every 2 weeks.

Experience has shown that calibration of fixed ground station clockswith respect to master clocks via long range radio frequency links isgenerally unsatisfactory due to problems of signal propagation andground station siting. The calibration accuracy required demands thatactual visits be made by a master clock to the ground station toestablish the required time accuracy.

Because of problems such as pulse rise time, equipment jitter andmultipath interference it has been suggested that the two-way rangingtechnique whereby ground stations calibrate airborne stations will notbe sufficiently precise to permit an airborne clock to recalibrate theground station. lt has thus been further suggested that the master clockhe landed in close proximity to the ground station to permit therequired calibration to take place. This type of calibration procedureis more expensive and time consuming than would be required if a simplefly-by of the airborne clock could be used for the calibration.

SUMMARY OF THE INVENTION The invention described below provides a methodand means for calibrating a collision avoidance system ground stationwith respect to an airborne master clock via line-of-sight two-wayranging techniques without landing the master clock. The aforementionedtwo-way ranging techniques are currently being used in the collisionavoidance system and are well known to those skilled in the art.Briefly, as used in the collision avoidance system, an aircraftrequesting synchronization of its clock with a remote clock located inthe donor, either a ground station or an airborne station, includes aspart of its collision avoidance message a synchronization request at apredetermined point in its time slot. As well known to those skilled inthe art, the geometry of the synchronization scheme just described issuch that if the synchronization response is received by the aircraftrequesting synchronization exactly at the predetermined point in thetime slot the clock on the aircraft requesting synchronization and theclock on the donor are exactly synchronized with one another. Any timedeviation of the reception of the synchronization response at theaircraft requesting synchronization from the predetermined point is ameasure of the out of synchronization of the clock on the aircraftrequesting synchronization with respect to the clock on the donor. Anaircraft requesting synchronization will thus be able to synchronize itsclock with the donors clock if it so desires.

In the present invention, the ground station requests synchronizationfrom an airborne master station which includes a master clock.

In its more sophisticated form, the operation of the invention may besummarized as follows. An aircraft equipped as a donor is flown in closeproximity to the ground station. The donor suitably transmits a standardcollision avoidance message during its assigned time slot and includestherein a code identifying the ground station. The ground station uponreceiving and deciphering the code automatically assumes a calibrationmode. During subsequent time slots, the ground station requestssynchronization from the donor in an essentially identical manner asairborne collision avoidance system stations normally requestsynchronization from a donor. For each synchronization request made thedonor transmits a synchronization response.

A plurality of such synchronization messages are exchanged between theground station and the donorwith the time deviation of the receipt ofthe synchronization response at the ground station with respect to theaforementioned predetermined point being recorded in a digital counter.At the completion of a predetermined number of such synchronizationexchanges the average deviation is extracted from the counter and usedto phase correct the ground station clock. Subse-' quently, a furtherplurality of synchronization messages are exchanged between the donorand the ground station with the original donor requestingsynchronization. The deviation is recorded and displayed at the originaldonor as a check of the validity of the ground station calibration.

Since an average error is obtained from a plurality of synchronizationmessages random errors such as those caused by pulse rise time,equipment jitter and multipath interference are effectively cancelledout.

It is thus an object of this invention to provide means for maintaininga ground station operating in a time ordered community in accuratecalibration.

' It is a further object of this invention to provide means whereby anairborne master clock may be used to maintain a ground station clock inrequired calibration without the need for landing the master clock.

These and other objects of the invention will be made apparent as thedescription of the preferred embodiment proceeds.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a block diagram illustratingan embodiment of the ground station portion of the invention.

FIG. 2 is a block diagram illustrating an embodiment of the airborneportion of the invention.

FIGS. 3A and 3B are time graphs illustrating the re ception ofsynchronization responses in the time slot of the station requestingsynchronization.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring first to FIG. 1 it canbe seen that a ground station includes a frequency source which derivesits accuracy from an extremely accurate and stable frequency signal suchas that generated by a cesium beam standard. One output of frequencysource 10 consists of clocking pulses having a predetermined pulserepetition frequency and which are applied to slot counter 12. It isassumed that'slot counter 12 has previously been started andsynchronized with respect to a master time reference. The slot countercomprises the ground station clock and is suitably comprised of a binarycounter which counts the clocking pulses applied thereto to keep a countof the length and number of time slots in the collision avoidance epoch.Timing gates 14, 16 and 18, also familiar to those skilled in the art,are provided to sense the state of counter 12 and to generate signals attime t t and t respectively, with respect to each time slot. Counter 12also generates a signal at t, with respect to the time slot and which isapplied as one input to AND gate 20. This latter signal is extinguishedat time The ground station additionally includes an antenna 22 fortransmitting and receiving synchronization messages. The antenna isconnected to the input of a receiver 24 and is further connected toreceive the output signal from a transmitter 26.

The ground station might enter the calibration mode in one of severalways. For instance, the calibration mode can be manually initiated fromthe ground or automatically initiated from the airborne donor stationwhich is to provide calibration. In the embodiment described, the groundstation enters the calibration mode upon command from the donor station.This is accomplished as follows. The standard collision avoidance systemtime. slot is 1500 microseconds long. The standard collision avoidancemessage is transmitted during a time slot and includes a 200 microsecondlong range pulse which has provisions for 120 biphase data bits. A fewof these data bits are preempted by the donor station to include apreassigned address code and parity check unique to the ground station.Antenna 22 intercepts the message from the donor and the message isprocessed by receiver 24. If the address code identifying thisparticular ground station is detected by decoder 28 it thereupongenerates an output signal at line 28a which is applied to resetcalibration interval counter 30 and error accumulator counter 32.Counter 30 counts the number of synchronization messages exchangedbetween the ground station and the donor and counts from a zero count toa maximum count at which time it stops until reset. Counter 30 generatesan output along line 30a to thus energize modulator 34 whenever counter30 is not at its maximum count. When the counter is at its maximum countthe signal on line 30a is extinguished. Modulator 34 is energized by thesignal on line 30a so that it can thereafter respond to signals at inputport 34a as will be explained more fully below.

It will be remembered that slot counter 12 keeps a count of the slotswithin an epoch as well as the timing within each individual time slot.Counter 12 communicates the instantaneous slot number via line 12a toempty slot memory 40. Pulse decoder 42, in addition to recognizingsynchronization response as will be explained also recognizes whether anormal range pulse from other aircraft is received at the groundstation. If a range pulse is received, this information is communicatedto empty slot memory 40 which records that information with the slotnumber. If a range pulse is not receivedduring a particular time slot,memory 40 takes note of this fact. When that time slot, during which arange pulse was not previously received, reoccurs memory 40 generates anoutput signal along line 40a. Line 40a is connected as one input to ANDgate 44. In addition, slot counter 12 generates an output on line 12b ata predetermined point in each time slot. Line 12b is connected as thesecond input to gate 44. Thus, at a predetermined point in each emptytime slot, gate 44 opens and a signal is applied therefrom to terminal34a of modulator 34. If the ground station is now in the calibrationmode, that is if modulator 34 is energized by the signal on line 30a,modulator 34 will trigger transmitter 26 to generate a synchronizationrequest via antenna 22. The aforementioned predetermined point in thetime slot is a point time spaced, with respect to the beginning of thetime slot such that the ground station will transmit a sychronizationrequest at the proper time.

Since, as will be explained, a plurality of synchronizations from theairborne master clock are required to calibrate the ground station, theuse of each empty time slot to exchange synchronization messages willspeed the calibration process. Of course, if less than each empty timeslot is used to exchange synchronization messages the calibration timewill be correspondingly longer.

As previously discussed and as well known to those skilled in the art adonor station upon receipt of the synchronization request will generatea synchronization response after a delay, the length of which isdetermined by the time of receipt of the synchronization request at thedonor station with respect to the beginning of the time slot asdetermined by donors clock. This delay period is such that if the donorsclock and ground station clock are exactly synchronized the responsewill be received at the ground station at a predetermined time measuredwith respect to the beginning of the time slot at the ground station. Asynchronization response received before or after 1, indicates theground station is not synchronized with the donor station and thedeviation from t, is a measure of the out-of-synchronization. A moreexhaustive description of the two-way synchronization technique can befound in U. S. Pat. No. 3,568,186.

The graphs of FIGS. 3A and 3B are useful in explaining the operation ofthe invention and reference to these figures should now be made. Thesefigures represent a portion of the time slot during which the groundstation is expecting synchronization. There is seen a time t,. If asynchronization response is received at t, it is known that the groundstation clock is synchronized exactly with the donor clock. FIG. 3Ashows the condition where the synchronization response is received aftert, and FIG. 3B shows the situation where the synchronization response isreceived before 1,. In both cases, the time between t, and the receiptof the synchronization response is a measure of theout-of-synchronization of the ground station clock with respect to thedonor. There is also shown a time t, which occurs a predetermined timeperiod before I and a time t which occurs an identical time period aftert,. In this embodiment, a synchronization response must be receivedbetween times t, and t; in order to be considered. A third time t;occurs the same time after t as occurs after t,

Returning to FIG. 1 slot counter 12 generates a signal at time t, whichis applied as one input to AND gate 20. The signal at t, suitablyremains on until time t when it is extinguished and then regenerated attime t, in the next time slot. Pulse decoder 42 considers all messagesreceived at the ground station. If a particular message includes asynchronization response decoder 42 generates an output on line 42awhich is applied as the second input to gate 20. If this response isreceived after t and before gate 20 will open and a pulse is applied tocounter 30 indicating that a synchronization response has been received.

A steering network for entering a number proportional to the deviationof the synchronization response with respect to t, is comprised of flipflops 50, 52 and 54 and exclusive OR gate 56. The set input terminal offlip flop 50 is connected to receive the output signals from gate 20.The t signal from gate 14 is connected to the reset input terminal offlip flop 50 and to the set input terminal of flip flop 52. The 2,,signal from gate 16 is connected to the reset input terminal of flipflop 52 and to the set input terminal of flip flop 54. The 1 signal fromgate 18 is connected to the reset input terminal of flip flop 54. Theset output signal from flip flop 50 together with the reset outputsignal from flip flop 52 are applied as inputs to exclusive OR gate 56.Counter 32 which when enabled accumulates pulses from frequency sourceis controlled by the aforementioned steering circuitry. In particular,when flip flop 54 is in the set state the resultant output on line 54acauses the pulses applied to counter 32 to subtract from the countalready contained therein. When flip flop 54 is in the reset state, theresultant output on line 54b causes the pulses applied to counter 32 toadd to the count already contained therein.

The operation of the steering circuit is as follows, assuming initiallythat flip flops 50 and 54 are in the reset state, flip flop 52 is in theset state and counter 32 has been reset to some initial state indicativeof zero error or deviation. Assume also that a signal is now receivedfrom gate 20 between t, and t, as illustrated in FIG. 38. Flip flop willbe toggled to the set state to thus apply an input to exclusive OR gate56. Remembering that flip flop 52 at this time is in the set state, itcan be seen that gate 56 will now generate an output to enable counter32 to be receptive to pulses received from frequency source 10.Remembering also that flip flop 54 at this time is in the reset state,the pulses entering counter 32 will be added to the number alreadycontained therein. The next signal received will of course be the t,signal which will reset flip flop 52 thus closing gate 56 to disablecounter 32, that is, to render the counter unresponsive to applied clockpulses from source 10. The count added to the counter 32 is proportionalto the time between the receipt of the synchronization response and t,.The 1, signal also sets flip flop 54. However, since counter 32 isdisabled, the DOWN signal now generated by flip flop 54 will beineffective. The next signal generated during this particular time slotis the 1 signal which will reset flip flop 54. The last signal to begenerated during this particular time slot is the t signal which willreset flip flop 50 and set flip flop 52, thus maintaining gate 56 closedand the counter disabled. Thus, in the case where the synchronizationresponse is received after 1 but before time 2,, counter 32 will haveentered therein a count proportional to the time difference between t,and the synchronization response, that is a count proportional to theout-of-synchronization of the ground station clock with respect to thedonor clock.

In the case where the synchronization response is received between t,and t as illustrated in FIG. 2A the operation of the steering circuit isas follows. As before, flip flops 50 and 54 are initially in the resetstate while flip flop 52 is in the set state. In this case, the firstsignal of interest generated is t, which toggles both flip flops 52 and54. The reset signal now applied to gate 56 opens that gate to enablecounter 32. Additionally, the set signal from flip flop 54 applies aDOWN signal to the counter so that pulses from frequency source 10 aresubtracted from the count originally contained in counter 32. The nextsignal received is the synchronization response generated by gate 20.This signal will set flip flop 50 whose resultant output signal willclose gate 56 to thus disable the counter. Later received signals t andwill return the flip flops to their initial condition without affectingthe count contained in counter 32.

It should be realized that if a synchronization signal is not receivedbefore time 1 a count proportional to the entire time between t, and twill be subtracted from counter 32 and this will constitute an invalidoperation upon the counter. It is thus necessary in this case to restorethe counter to a condition that existed before the pulses weresubtracted therefrom. Since no synchronization response is received thesignal received after the t, signal will be the t signal which willtrigger flip flop 54 to the reset state to thus generate the UP signalwhich is applied to counter 32. Since gate 56 is still open, the pulsesapplied to the counter from frequency source 10 will now be addedtherein until the 1 signal is generated, at which time-flip flop 52 istriggered into the set state to thus extinguish its reset output signalpreviously applied to gate 56, closing that gate and disabling thecounter. Thus, the same number of clock pulses are entered into countermeans 86 as were previously removed therefrom, restoring the counter toits previous condition.

It will be remembered that calibration interval counter 30 counts thenumber of synchronization replies received. Since, as previouslymentioned, counters 30 and 32 comprise binary counters it is merelynecessary to sense certain of the most significant bits in counter 32after the correct number of synchronization replies have been sensed bycounter 30 in order to compute the average number of pulses added orsubtracted from counter 32 during the calibration interval. Toaccomplish this, the number of bits comprising counter 30 is madeidentical to the number of least significant bits ignored in taking theaverage count contained in counter 32. For example, if counter 30contains eight bits so that it attains a maximum count every 128synchronization responses received, it is merely necessary to ignore thefirst eight least significant bits of counter 32 and to consider onlythe subsequent most significant bits to determine the average number ofpulses added to counter 32 over the calibration interval of 128synchronization responses.

Counter 32 comprises a combined binary synchronous counter and shiftregister. During the calibration interval, which is here assumed to be328 synchronization responses, the counter functions as a binary counterwith the contents of the counter being accumulated clock pulses thetotal number of which is proportional to the synchronization error ofthe ground station clock with respect to the master clock taken over thecalibration interval. Upon receipt of the 128th synchronization responsecalibration interval counter 30 attains its maximum count and generatesan output via line 30b which is applied to counter 32. This changes themode of counter 32 from count to shift, and the resident binary numberis shifted right eight places. During the shift operation, counter 30 istime shared to track the number of shifts and terminate the shiftoperation after the eighth shift. At this time, counter 32 may revert tothe counter mode and serially add or subtract pulses to thesynchronization counter 60. Alternately, the contents of the counter 32may be loaded broadside, that is parallel-by-bit, into synchronizationcounter 60 using 2s complement representation for negative numbers. Themeans for shifting the information from counter 32 into synchronizationcounter 60 is represented by line 32a.

If the timing errors are such that the ground station timing is early,counts are subtracted from synchronization counter 60 or if the parallelload technique is used, the correction term will be in the 2'scomplement form. For late timing errors, the converse is true, and thecounts are added serially to synchronization counter 60 or loadedparallel depending on the technique used. Correction of the groundstation time base (slot counter 12) is then accomplished by a singlereset pulse provided by the synchronization counter 60 which has beenadjusted in accordance with the average error computed over thepreceding 128 synchronization replies.

It should be noted that the normal operation of the ground station, thatis, the providing of synchronization responses to aircraft withincommunication range when requested, is in no way affected by thecalibration process just described. As well known to those skilled inthe art, synchronization counter 60 comprises a normal portion of theground station equipment and is used for providing the aforementionedsynchronization responses when requested. Although not shown forsimplicity, the decoding by the ground station of a synchronizationrequest in an occupied time slot will initiate normal synchronizationreply in that time slot. This is accomplished by the well known means,using the synchronization counter 60. As mentioned above, the time baseas maintained by slot counter 12 is corrected only once, after thecalibration interval is complete. The affect on the normal groundstation synchronization process is simply that more accuratesynchronization is not provided to the airborne community aftercalibration of the ground station.

As previously mentioned the completion of the calibration interval issignaled when counter 30 reaches its maximum count at which time itssignal on line 30a is extinguished. Accordingly, modulator 34 isdeenergized so that the ground station ceases transmission ofsynchronization requests. In addition, at the resetting of the slotcounter 12 by synchronization counter 60 via line 60a, which resettingtime is at the beginning of a time slot, the reset pulse is also appliedto a further modulator 62 which receives carrier frequencies fromexciter 64 so as to key transmitter 26 to transmit via antenna 22 amessage modulated to contain information that the calibration intervalis complete at the ground station.

Refer now to FIG. 2 which is a block diagram of the airborne stationcontaining the master clock. Suitably identical elements are marked withthe same reference numerals as used in FIG. 1 while those elements whichare essentially identical to those elements in the ground station butwhich may be set to respond to or to generate a different code aremarked with a prime The airborne station includes a frequency source 10and a master clock in the form of slot counter 12 which will be used tocalibrate the ground station. As before, the slot counter keeps a countof the length and number of the time slots in the collision avoidancesystem epoch. The airborne station also includes a calibration intervalcounter 30 which generates an output along line 30a only when it is notat its maximum count. Line 30a communicates with one input to AND gate44 and hence that gate remains closed so long as counter 30 remains atits maximum count. It is assumed now that calibration interval counter30 is at its maximum count and stopped, hence gate 44 is closed. It isadditionally assumed that the airborne station is approaching thevicinity of the ground station prior to actual calibra tion. Switchesrepresented at 63 may be set to a code identifying this particularground station, this code being set into biphase modulator 62. Alatching switch, suitably manually operated, represented at 11 isactuated to apply an enabling signal to modulator 62'. At the beginningof the airborne stations own time slot a source of carrier frequency,exciter 64, is turned on by the signal from slot counter 12 applied vialine 120. As a result, a signal modulated by modulator 62' to includethe identification of the ground station is transmitted by transmitter26 via antenna 22. It will be remembered that upon receipt of thisparticular coded message the ground station will subsequently transmit auniquely coded synchronization request at the next empty time slot. Thismessage from the ground station is intercepted by antenna 22 andreceiver 24 and deciphered in pulse decoder 42'. The receivedsynchronization request is now applied to latching switch 11 to therebyunlatch that switch and is also applied to synchronization counter 60.The operation of the synchronization counter is identical to that knownin the prior art and will not be explained here. Briefly, in the knownsynchronization counter the counter is informed of the beginning of atime slot by a signal from slot counter 12 applied at terminal 60a.Synchronization counter 60 immediately begins counting at a firstpredetermined rate. Upon receipt of a synchronization request, the countrate shifts to a different rate, normally one-half the previous rate.Counting at the second rate continues until a predetermined count isreached at which time a synchronization response is initiated by asignal on line 60b which is applied to modulator 34' so that a uniquelycoded synchronization response is transmitted. The airborne stationcontinues to respond to further synchronization requests received fromthe ground station. It will be remembered that at the completion of thecalibration interval the ground station transmits another uniquely codedmessage indicating that the calibration interval is complete. Thismessage is intercepted by the airborne station and deciphered by decoder28'. The resultant output signal from decoder 28' resets calibrationinterval counter 30 and error accumulator 32. Since counter 30 is nolonger at its maximum count, it generates an output on line 30a whichallows gate 44 to open. The empty slot memory 40 together with slotcounter [2 permit synchronization requests to be made at each empty timeslot. The manner in which this is accomplished is identical to thatpreviously described with respect to the ground station. Briefly, at theproper time in the time slot counter 12 applies a signal via line 12b togate 44. If that time slot is unoccupied memory 40 also applies a signalto gate 44 via line 40a. The gate thus opens and excites modulator 34via line 44a to transmit a synchronization request. The resultantresponses from the ground station are deciphered by decoder 42' andapplied at gate terminal 20a. The time arrival of the synchronizationresponses from the ground station at the airborne station are comparedagainst time t, as determined by the master clock. The means for makingthis comparison is suitably identical to that used in the ground stationand is comprised of gates 14, 16 and 18, error accumulator counter 32and the steering network comprised of flip flops 50, 52 and 54 andexclusive OR gate 56.

When calibration interval counter 30 reaches its predetermined maximumcount the signal on line 30a is extinguished thus closing gate 44 andterminating the calibration procedure. A signal from counter 30 at itsmaximum count is also suitably applied to counter 32 to cause it to readout its contents in some utilization unit such as display 66 forvalidation of the ground station calibration.

The invention claimed is:

l. A multiple unit system wherein each unit includes clock meansintended to be operated in synchronism with a system-wide sequence ofrepeating cycles of time slots, said units additionally including meansfor synchronizing said clock means with one another by a two-way rangingtechnique wherein a unit requesting synchronization receives asynchronization signal the time of arrival of which at said unitrequesting synchronization is a measure of the individualsynchronization error existing between the unit requestingsynchronization and a unit transmitting said synchronization signal asobserved at said unit requesting synchronization and wherein one saidunit includes a mobile master unit and another unit includes local clockmeans responsive to a local accurate frequency source for establishingsaid system-wide sequence of repeating cycles of time slots, saidanother unit additionally comprising:

means for obtaining from said master unit a synchronization signalduring each of a plurality of said time slots; means responsive to eachof said synchronization signals as received at said unit requestingsynchronization for generating a number of clock pulses related to saidindividual synchronization error; first counter means for cumulatingsaid clock pulses; second counter means for keeping a count of thenumber of said synchronization signals received by said unit requestingsynchronization and for generating an output signal when it attains apredetermined count; means responsive to said output signal forextracting the average of the instantaneous count contained in saidfirst counter means; and, means responsive to said average forcalibrating said local clock means. 2. The system of claim 1 whereinsaid another unit additionally includes:

means responsive to the calibration of said local clock means fortransmitting a second signal from said another unit to siad master unit,said second signal containing uniquely coded information indicatingcalibration of said local clock means is complete. 3. The system ofclaim 2 wherein said master unit additionally includes:

means responsive to said second signal for obtaining a plurality ofsynchronization signals from said another unit; and, means responsive tosaid plurality of synchronization signals for calculating the error ofsaid local clock. 4. The system of claim 1 wherein said means forobtaining comprises:

means for memorizing which time slots are unoccupied; means cooperatingwith said means for memorizing for transmitting synchronization requestsin a plurality of unoccupied time slots, said master unit responding toeach said synchronization request with a synchronization signal.

1. A multiple unit system wherein each unit includes clock meansintended to be operated in synchronism with a system-wide sequence ofrepeating cycles of time slots, said units additionally including meansfor synchronizing said clock means with one another by a two-way rangingtechnique wherein a unit requesting synchronization receives asynchronization signal the time of arrival of which at said unitrequesting synchronization is a measure of the individualsynchronization error existing between the unit requestingsynchronization and a unit transmitting said synchronization signal asobserved at said unit requesting synchronization and wherein one saidunit includes a mobile master unit and another unit includes local clockmeans responsive to a local accurate frequency source for establishingsaid system-wide sequence of repeating cycles of time slots, saidanother unit additionally comprising: means for obtaining from saidmaster unit a synchronization signal during each of a plurality of saidtime slots; means responsive to each of said synchronization signals asreceived at said unit requesting synchronization for generating a numberof clock pulses related to said individual synchronization error; firstcounter means for cumulating said clock pulses; second counter means forkeeping a count of the number of said synchronization signals receivedby said unit requesting synchronization and for generating an outputsignal when it attains a predetermined count; means responsive to saidoutput signal for extracting the average of the instantaneous countcontained in said first counter means; and, means responsive to saidaverage for calibrating said local clock means.
 2. The system of claim 1wherein said another unit additionally includes: means responsive to thecalibration of said local clock means for transmitting a second signalfrom said another unit to siad master unit, said second signalcontaining uniquely coded information indicating calibration of saidlocal clock means is complete.
 3. The system of claim 2 wherein saidmaster unit additionally includes: means responsive to said secondsignal for obtaining a plurality of synchronization signals from saidanother unit; and, means responsive to said plurality of synchronizationsignals for calculating the error of said local clock.
 4. The system ofclaim 1 wherein said means for obtaining comprises: means for memorizingwhich time slots are unoccupied; means cooperating with said means formemorizing for transmitting synchronization requests in a plurality ofunoccupied time slots, said master unit responding to each saidsynchronization request with a synchronization signal.